Location: Sunnyvale, CA
Company: Google
of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
As a Tensor Core Hardware Architect within Google's Silicon team, you will help deliver solutions that have an impact on the technical infrastructure that enables Google. You will provide technical leadership to a group of hardware engineers in an innovative and fast-paced environment, with a focus on ASIC chip design. You will own and drive complex
technical projects from the concept/planning stage through execution and closure. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running.
From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. The US base salary range for this full-time position is $172,000-$263,000 bonus equity benefits. Our salary ranges are determined
by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position across all US locations.
Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience in ASIC hardware implementation. Experience providing technical leadership to engineering design teams. Preferred qualifications: Experience in architecture and implementation of Machine Learning Hardware. Experience with multiple-clock-domain designs. Knowledge of Machine Learning market, technological and business trends, software ecosystem, and emerging applications. Responsibilities Create differentiated architectural innovations for Google's Tensor Core Units.
Evaluate the power, performance, and cost of prospective architectural changes. Lead the implementation of Tensor Core improvements including microarchitecture, RTL design, floorplanning and power, performance, and area closure. Contribute to design methodology, libraries, and code review. Requisition #: 136394693710619334pca3lyuhf
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